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  cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 1 / 9 mtd070p15j 3 cyste k product specification p - channel enhancement mode power mosfet MTD070P15J3 features ? single drive requirement ? low on - resistance ? fast switching characteristic ? pb - free lead plating and halogen - free package symbol outline o rdering inf ormation device package shipping mtd070p15j 3 - 0 - t3 - g t o - 252 (pb - free lead plating and halogen - free package) 25 00 pcs / t ape & reel to - 252(dpak) MTD070P15J3 g gate d drain s source bv dss - 150v i d @v gs = - 10v, t c =25 c - 21a i d @v gs = - 10v, t a =25 c - 3.7a r ds(on) @v gs = - 10v, i d = - 5.2a 66m (typ) r ds(on) @v gs = - 4.5v, i d = - 5a 74m (typ) g d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pcs / tape & reel, 13 reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 2 / 9 mtd070p15j 3 cyste k product specification absolute maximum ratings (ta=25 ? c) parameter symbol limits unit drain - sour c e voltage v ds - 15 0 v gate - source voltage v gs 20 continuous drain current @v gs = - 10v, t c =25 ? c i d - 21 a continuous drain current @v gs = - 10v, t c =100 ? c - 14.9 continuous drain current @v gs = - 10v, t a =25 ? c i dsm - 3.7 continuous drain current @v gs = - 10v, t a =100 ? c - 2.3 pulsed drain current i dm - 84 *1 single pulse avalanche current i as - 21 single pulse avalanche en ergy @ l=3.6mh, v gs = - 10v, i as = - 21a e as 772 *2 mj power dissipation t c =25 p d 94 *4 w t c = 100 47 *4 t a =25 p dsm 2.5 *3 t a = 100 1.0 *3 operating junction and storage temperature tj, tstg - 55~+1 75 ? c thermal data parameter symbol value unit thermal resistance, junction - to - case, max r th,j - c 1.6 ? c /w thermal resistance, junction - to - ambient, max r th,j - a 50 *3 note : *1. pulse width limited by saf e operating area. * 2 . 100% tested by conditions of v dd = - 50v, l=1mh, v g = - 10v, i as = - 21a. *3 . the value of rth,j - a is measured with the device mounted on 1 in 2 fr - 4 board with 2 oz. copper, in a still air environment with t a =25 c . the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150 c . the value in any given application depends on the users specific board design, and the maximum temperature o f 175 c may be used if the pcb allows it. *4 . the power dissipation p d is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. it is used to determined the current rati ng, when this rating falls below the package limit. characteristics (t j =25 ? symbol min. typ. max. unit test conditions static bv dss - 150 - - v v gs = 0v , i d = - 250 a v gs(th) - 1 .3 - - 2.6 v ds = v gs , i d = - 250 a g fs - 17 - s v ds = - 15v , i d = - 5.2a i gss - - 100 n a v gs = 20v i dss - - - 1 a v ds = - 120v, v gs =0v i dss - - - 25 v ds = - 120v, v gs =0v, tj=70 ? c *r ds ( on ) - 66 85 m v gs = - 10v , i d = - 5.2a *r ds ( on ) - 74 96 v gs = - 4. 5v , i d = - 5a dynamic *qg - 74.6 - nc i d = - 5.2a, v ds = - 120v, v gs = - 10v *qgs - 10.4 - *qgd - 22.8 -
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 3 / 9 mtd070p15j 3 cyste k product specification *t d(on) - 22.2 - ns v ds = - 75v, v gs = - 10v, r g =2.7 , i d = - 5.2a *tr - 22 - *t d(off) - 87.4 - *t f - 33.6 - ciss - 3378 - pf v gs =0v, v ds = - 25v, f=1mhz c o ss - 234 - crss - 93.7 - rg - 3.6 - f=1mhz source - drain diode *i s - - - 21 a *v sd - - 0.74 - 1.2 v i s = - 4.2a, v gs =0v *trr - 44 - ns i f = - 5.2a, v gs =0v, di f /dt=100a/ s *qrr - 93 - nc *pulse test : pulse width ? 3 0 0s, duty cycle ? 2% recommended soldering footprint
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 4 / 9 mtd070p15j 3 cyste k product specification typical characteristics typical output characteristics 0 10 20 30 40 50 60 70 80 0 2 4 6 8 10 -v ds , drain-source voltage(v) -i d , drain current(a) 10v,9v,8v,7v,6v 3.5v -v gs =3v 4v 4.5v 5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 100 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) in descending order v gs = -4.5v -10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 2 4 6 8 10 12 14 16 18 20 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 100 200 300 400 500 600 700 800 900 1000 0 2 4 6 8 10 -v gs , gate-source voltage(v) r ds(on ), static drain-source on- state resistance(m) i d =-5.2a drain-source on-state resistance vs junction tempearture 0 0.5 1 1.5 2 2.5 3 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-10v, i d =-5.2a r ds(on) @tj=25 c : 66m typ
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 5 / 9 mtd070p15j 3 cyste k product specification typical characteristics (cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0 10 20 30 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss f=1mhz threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 tj, junction temperature(c) -v gs(th) , normalized threshold voltage i d =-250 a i d =-1ma maximum safe operating area 0.1 1 10 100 0.1 1 10 100 1000 -v ds , drain-source voltage(v) -i d , drain current (a) r ds(on) limited dc 10ms 100ms 1ms 100 s 1s t c =25c, tj=175c, v gs =-10v, r jc =1.6c/w, single pulse gate charge characteristics 0 2 4 6 8 10 0 10 20 30 40 50 60 70 80 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-5.2a v ds =-30v v ds =-75v v ds =-120v maximum drain current vs case temperature 0 5 10 15 20 25 25 50 75 100 125 150 175 200 t c , case temperature(c) -i d , maxim um drain current(a) v gs =-10v, tj(max)=175c, r jc =1.6c/w, single pulse typical transfer characteristics 0 10 20 30 40 50 60 70 80 0 2 4 6 8 10 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 6 / 9 mtd070p15j 3 cyste k product specification typical characteristics (cont.) forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 -i d , drain current(a) g fs , forward transfer admittance(s) v ds =-15v pulsed ta=25c single pulse maximum power dissipation 0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) peak transient power (w) t j(max) =175c t c =25c r jc =1.6c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *r jc (t) 4.r jc =1.6c/w
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 7 / 9 mtd070p15j 3 cyste k product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 8 / 9 mtd070p15j 3 cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperat ure profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of th e package, measured on the package body surface.
cystech electronics corp. spec. no. : c 985j3 issued date : 20 15 . 12 . 07 revised date : 2016.02.02 page no. : 9 / 9 mtd070p15j 3 cyste k product specification to - 252 dimension dim inches millimeters dim inches millimeters min. max. min. max. min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0. 188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.5 80 l 2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1. controlling dimension: millimeters. 2 . maximum lead thic kness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cystek sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves the right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? cyste k assumes no liability for any consequence of customer product design, infringement o f patents, or application assistance. marking: style: pin 1. gate 2. drain 3. source 4.drain 3 - lead to - 252 plastic surface mount pack age cystek package code: j3 device name date code d070 p15 1 2 3 4


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